Meeting date: 14 feb 2006
Members (asterisk for those attending):
*Arpad Murayni,
*Bob Ross,
*Todd Westerhoff,
*Mike LaBonte,
*Paul Fernando,
*Barry Katz,
Walter Katz,
Ken Willis,
Ian Dodd

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Review of ARs:

AR: Arpad prepare technical presentation for IBIS summit
- done

AR: Ian print slides for handout
- done

AR: Mike update website
- done

AR: Mike finish documentation examples.
- TBD

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Discussion of ibis-macro website update
- Needs to help outsiders more
- Current home page is the document archive, not useful to many
- Needs a real home page with more explanation

Macro Library Documentation
- 1 module is missing trigger ports
- Missing usage notes on some
- No VHDL examples
  - probably not worth an automated conversion from Verilog-A
  - each file should only have examples in the "right" language

AR: Mike make the website more outsider-friendly

AR: Mike finish documentation

AR: Todd contact Cadence about a new representative

New HSPICE beta
- Arpad tested
- successfully resizes arrays
- Paul's script can be used as-is

DesignCon Summit review
- Arpad ran out of time presenting
- Discussion of standardization
- Suggestion: Implement Mentor RocketIO AMS models as macromodels
- Rambus doing related work
- TI interested in using macros
  - Who was the contact? IBIS minutes will say
  - Not sure about experience level

VHDL-AMS tools
- SMASH similar to SystemVision
- HSPICE and ADS use Tiburon AMS compiler
  - Verilog-A only
  - for analog users
- How do these compiled executables work?
  - Could be a step toward encrypted models
  - Not very distributable
- Encrypted models
  - This is important
  - All workable solutions are proprietary
  - Not an important problem

Templates
- Need more templates on the web site (only 1 now)
- PreDeEmphasis needs update
- Get models from Mentor
  - wait for Ian to return from China and Poland
  - may depend on digital ports

AR: Todd contact Ian
AR: Bob contact Gary Pratt

Todd will not be available for a call next week

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Next meeting: Tuesday 21 feb 2006 12:00pm PT